With the coming of ubiquitous society, there is increasing expectation for compact electronic apparatus, such as a mobile phone and a PDA, which are representatives of a mobile information terminal having wireless communication function. Therefore, the more compact, lighter-weight electronic apparatus are being developed. In the future, a demand for multiple functions and technical advantages is expected to increase in order to meet various needs.
In the wireless communication apparatus, it is necessary to combine an LSI chip and a different type device such as a passive component. In order to satisfy the needs, because there is a limit in improvement of a single device performance, and it is necessary to integrate the devices having different performance.
However, for example, the device having a function of a passive component is hardly formed on the LSI chip. In a method for integrating the LSI chip and the passive component on a substrate, there is a problem in that integration density is low. Therefore, there is a demand for a technology of integrating different type devices including the passive component and the LSI chip with high density to form one chip.
A method for integrating the different type devices are roughly divided into two. One of the methods is called system on chip (SOC) in which the integration is achieved by directly forming all the devices on one chip.
In the method, high device integration is implemented, and scaling-down of global wiring between the devices is also performed because all the devices are formed on one chip. Therefore, the high integration, high performance, and a low-profile package can be implemented.
However, there is a limitation to the device that can be integrated in the method. For example, the device made of a crystalline material such as a gallium arsenide is hardly formed on a silicon substrate because of a difference in lattice constant and a difference in thermal expansion coefficient.
It is not efficient that the device, such as an LSI, in which a small design rule is required and the device formed by a large design rule are made through the same process. Particularly, because all the processes are need to be changed in incorporating a new device, unfortunately cost increases in developing the new device, and a development time is lengthened.
The other method is called a system in package (SIP). In the system in package, the chips are separately formed, and the chips are mounted on a substrate called an interposer. In the method, because the device is individually formed, there is no limitation to the device. Because the existing chip can be used in developing the new system, the development cost is reduced and the development time can be shortened.
As to a problematic point, because the interposer and the chip are connected by a bonding wire or a bump, the highly dense chip arrangement, the scaling-down of the wiring, and the thin package are hardly implemented.
New integration technologies have been proposed in order to solve the problems. For example, after the different type devices formed by individual producing technologies are inspected and selected, the different type devices are disposed on a wafer and formed as a reconstruction wafer. Then a re-wiring layer including an insulating layer and a small design rule wiring is formed through a leading-edge semiconductor process. In the technology, unlike the existing SIP, the necessity to use the interposer substrate is eliminated, and the devices can be connected using the small design rule wiring through the semiconductor process. Therefore, the high integration can be implemented.
Unlike the existing SOC, the different type devices can be combined. Accordingly, the existing device can be used in constructing the new system, and the development time is shortened. As a result, the development cost can be reduced.